Here is a holistic computing architecture block diagram proposal (more for inspiration) to be used in a OSE’s GVCS (or similar) computing platform. It is a 32-bit version in a General Purpose Processing Unit (PU) → Video PU → Data Access PU → Sound PU → Input & Expansions PU configuration sequence.
The highlight is that the entire node can access up to 14GiB, using just 32-bit address buses (each component addresses up to 4GiB). The view is that the motherboard should not need to be replaced that frequently, and that high wiring density (i.e. using 64-bit address buses) may not be possible in the early days of local production.
I’ve been sitting on this draft for a couple months trying to figure out what could be significantly improved. I tried several other sequence combinations, and this one was what always surpassed the others (in my view; you are free to experiment). The other combinations that did surpass this one in some areas were the ones which had the DAPU adjacent to the GPPU. Those are more focused for data mining applications.
I also tried increasing the architecture to six (hexa) outer components, which didn’t resonate that well. Anyway, this is all intuition work, based on experience and imagination and I just wanted to get other people inspired who already have the chops to roll something like this out into the wild. Testing examples in the real world will give the best feedback, which is still far away from coming true. This would require redesigning and implementing most of the computing stack (such as the operating system).
Something I “discovered”, which is beyond the scope of this post, is to combine several nodes in a pattern for cluster computing. For that, a hexa-proximus architecture would fit like a glove. Maybe even in a geodesic dome, who knows.
Here’s the source file you can download and edit: penta-proximus-alpha.odg (Open/Libre Office Draw).
